LIM, Huang Hong; CHUA, King Lee. Design of 32-Bit RISC-V Architecture Using Verilog Hardware Description Language. Evolution in Electrical and Electronic Engineering, [S. l.], v. 6, n. 2, p. 465–476, 2025. Disponível em: https://penerbit.uthm.edu.my/periodicals/index.php/eeee/article/view/21260. Acesso em: 7 apr. 2026.