Design of Multiplication and Division Operation for 16 Bit Arithmetic Logic Unit (ALU)

Authors

  • Abd Kadir Mahamad
  • Muhammad Ikmal Mohd Taib
  • Muhammad Najmi Zikry Nazri
  • Syazana Khairol Amali
  • Muhamad Amirul Mohd Yusof @Md Jusoh1

Keywords:

ALU, VHDL, 16 bit, Altera Quartus II

Abstract

Arithmetic Logic Unit (ALU) is one of the most crucial components of an embedded system and have being used in many devices such as cell phones, calculator, computers, and many other applications. It performs all the arithmetic and logical operations such as addition, subtraction, logical AND and OR. An Arithmetic Logic Unit (ALU) is a multi-functional circuit that conditionally performs one of several possible functions of two operands A and B depending on control inputs. It is nevertheless the main performer of any computing device. The objective of this project is to design ALU 16-bit using VHDL. The Altera Quartus II software is used as tool to create the designed operation of multiplication and division. The simulation results show the proposed ALU design successfully perform the operation of multiplication and division of 16 bits operation.

 

Downloads

Published

28-12-2020

Issue

Vol. 1 No. 2 (2020)

Section

Articles

How to Cite

Mahamad, A. K., Mohd Taib, M. I. ., Nazri, M. N. Z. ., Amali, S. K. ., & Mohd Yusof @Md Jusoh1, M. A. . (2020). Design of Multiplication and Division Operation for 16 Bit Arithmetic Logic Unit (ALU). Journal of Electronic Voltage and Application, 1(2), 46-54. https://penerbit.uthm.edu.my/ojs/index.php/jeva/article/view/7219

Most read articles by the same author(s)