The Effects of Novel Sandwich Wafer Mounting Technique on Silicon Wafer Chipping Performance

Abstract

Die chipping, which may result in crack die, is a major quality concern for semiconductor manufacturers. Since crack die cannot always be screened during testing process, it is critical to evaluate a process that will minimise chipping during the wafer dicing process. In this study, novel mounting techniques were introduced to assess the chipping performance of wafer dicing process. Three non-circuitry silicon wafers were evaluated with 300 µm wafer thickness and 6 x 6 mm die size including various mounting techniques were tested. The conventional wafer mounting technique was found generated high chipping due to insufficient gripping during the mechanical wafer dicing process. The novel mounting techniques introduced in this publication, including semi sandwich and full sandwich wafer mounting techniques, added a cushioning effect and additional gripping method for higher stability during the dicing process. The full sandwich mounting technique demonstrated significant improvement in wafer dicing chipping performance compared to the conventional mounting process. The results of this study suggest that the new mounting technique can effectively minimise die chipping during wafer dicing, which can improve the quality and yield of semiconductor products.