Performance Analysis of Nano Transistor Based Binary and Ternary Logic Gates
Keywords:
MOSFET, CMOS, Ternary logic, GNRFET, CNTAbstract
As technology scales down to the nanoscale regime, several short channel effects emerge, which have a greater impact on device performance. Researchers are exploring for innovative materials that can fit into nanometer-sized spaces to improve the performance of digital circuits. This paper provides Nano transistor-based digital circuits for improving digital circuit performance over traditional MOSFET-based circuits. Carbon nanotubes (CNTs) and graphene nano ribbons (GNR) have been investigated as possible candidates because to their high carrier mobility. The influence of CNTFET and GNRFET parametric variation with threshold voltage on performance metrics such as delay, and power has been investigated. A comparison of MOSFET, CNTFET, and GNRFET-based logic circuits is performed. A primer on ternary logic is also provided. Because of the dependence of the threshold voltage on the shape of carbon nanotubes and graphene nano ribbons, it is possible to use it for ternary logic design. Following that, ternary logic circuits are constructed with CNTFETs and GNRFETs. It has been determined that CNTFET and GNRFET-based circuits are more energy efficient than standard MOSFET circuits. It is also established that innovative ternary logic offers a relatively fast and low power digital circuit design option. All digital circuits were simulated using the HSPICE tool for the 32nm technology node.
Downloads
Downloads
Published
Issue
Section
License
Copyright (c) 2023 International Journal of Integrated Engineering
This work is licensed under a Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International License.
Open access licenses
Open Access is by licensing the content with a Creative Commons (CC) license.
This work is licensed under a Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International License.